/opt/imh-python/lib/python3.9/site-packages/numpy/distutils/checks
NameSizeModeActions
cpu_asimd.c8180644editdlrm
cpu_asimddp.c4320644editdlrm
cpu_asimdfhm.c5290644editdlrm
cpu_asimdhp.c3790644editdlrm
cpu_avx.c7790644editdlrm
cpu_avx2.c7490644editdlrm
cpu_avx512cd.c7590644editdlrm
cpu_avx512f.c7550644editdlrm
cpu_avx512_clx.c8420644editdlrm
cpu_avx512_cnl.c9480644editdlrm
cpu_avx512_icl.c10040644editdlrm
cpu_avx512_knl.c9560644editdlrm
cpu_avx512_knm.c11320644editdlrm
cpu_avx512_skx.c10100644editdlrm
cpu_avx512_spr.c9040644editdlrm
cpu_f16c.c8680644editdlrm
cpu_fma3.c8170644editdlrm
cpu_fma4.c3010644editdlrm
cpu_neon.c6000644editdlrm
cpu_neon_fp16.c2510644editdlrm
cpu_neon_vfpv4.c6090644editdlrm
cpu_popcnt.c10490644editdlrm
cpu_sse.c6860644editdlrm
cpu_sse2.c6970644editdlrm
cpu_sse3.c6890644editdlrm
cpu_sse41.c6750644editdlrm
cpu_sse42.c6920644editdlrm
cpu_ssse3.c7050644editdlrm
cpu_vsx.c4780644editdlrm
cpu_vsx2.c2630644editdlrm
cpu_vsx3.c2500644editdlrm
cpu_vsx4.c3050644editdlrm
cpu_vx.c4610644editdlrm
cpu_vxe.c7880644editdlrm
cpu_vxe2.c6240644editdlrm
cpu_xop.c2340644editdlrm
extra_avx512bw_mask.c6360644editdlrm
extra_avx512dq_mask.c5040644editdlrm
extra_avx512f_reduce.c15950644editdlrm
extra_vsx4_mma.c4990644editdlrm
extra_vsx_asm.c9450644editdlrm
test_flags.c160644editdlrm
Edit: /opt/imh-python/lib/python3.9/site-packages/numpy/distutils/checks/extra_avx512f_reduce.c (1595B)
#include /** * The following intrinsics don't have direct native support but compilers * tend to emulate them. * They're usually supported by gcc >= 7.1, clang >= 4 and icc >= 19 */ int main(void) { __m512 one_ps = _mm512_set1_ps(1.0f); __m512d one_pd = _mm512_set1_pd(1.0); __m512i one_i64 = _mm512_set1_epi64(1); // add float sum_ps = _mm512_reduce_add_ps(one_ps); double sum_pd = _mm512_reduce_add_pd(one_pd); int sum_int = (int)_mm512_reduce_add_epi64(one_i64); sum_int += (int)_mm512_reduce_add_epi32(one_i64); // mul sum_ps += _mm512_reduce_mul_ps(one_ps); sum_pd += _mm512_reduce_mul_pd(one_pd); sum_int += (int)_mm512_reduce_mul_epi64(one_i64); sum_int += (int)_mm512_reduce_mul_epi32(one_i64); // min sum_ps += _mm512_reduce_min_ps(one_ps); sum_pd += _mm512_reduce_min_pd(one_pd); sum_int += (int)_mm512_reduce_min_epi32(one_i64); sum_int += (int)_mm512_reduce_min_epu32(one_i64); sum_int += (int)_mm512_reduce_min_epi64(one_i64); // max sum_ps += _mm512_reduce_max_ps(one_ps); sum_pd += _mm512_reduce_max_pd(one_pd); sum_int += (int)_mm512_reduce_max_epi32(one_i64); sum_int += (int)_mm512_reduce_max_epu32(one_i64); sum_int += (int)_mm512_reduce_max_epi64(one_i64); // and sum_int += (int)_mm512_reduce_and_epi32(one_i64); sum_int += (int)_mm512_reduce_and_epi64(one_i64); // or sum_int += (int)_mm512_reduce_or_epi32(one_i64); sum_int += (int)_mm512_reduce_or_epi64(one_i64); return (int)sum_ps + (int)sum_pd + sum_int; }